Transmission of Constant Bit Rate (CBR) data streams, including Time Division Multiplexing (TDM) traffic, over Packet Switched Networks (PSN) is quickly becoming a necessity for telecommunication networks, as service providers and carriers migrate to PSN, abandoning traditional synchronous digital networks, based on SONET (Synchronous Optical Networking), SDH (Synchronous Digital Hierarchy) or PDH (Plesiochronous Digital Hierarchy).
There are many methods for carrying CBR traffic over PSN. These methods are usually referred to as Circuit Emulation Service (CES) or Pseudo Wire Emulation (PWE), and there are several standards that define different CES protocols, such as the Metro Ethernet Forum's MEF 8 (CESoETH) specification, and the Internet Engineering Task Force's (IETF) RFC 4553 (SAToP), RFC 5086 (CESoPSN), and RFC 5087 (TDMoIP) specifications.
An emulated TDM service (such as T1 or E1 digital signals) requires an accurate clock at the receiving end in order to deliver the service properly. An emulated TDM stream is typically implemented as a stream of data packets which are transmitted in accordance with a TDM clock. At the receiving end, the clock can be obtained from an external reference clock source or recovered from the received packet stream.
Extracting the timing information from a highly jittered source such as packet stream is a complex task, and in many cases, the recovered clock is not accurate enough for a particular TDM service. A number of methods attempt to improve the quality of the clock transport in the PSN. These methods include, but are not limited to, Adaptive Clock Recovery, Differential Clock Recovery, IEEE 1588v2, and Synchronous Ethernet, each of which is discussed briefly below.
Adaptive Clock Recovery reconstructs the original clock by analyzing the arrival time of the received data packets, and averaging their arrival rate over a sufficiently long period. Adaptive Clock Recovery can also be performed on an out-of-band packet stream with a rate related to the clock of the TDM service being emulated. Due to the inherent packet delay variation present in PSNs and the fact that the delivery of packets is not guaranteed, the clock accuracy and stability (wander) provided by Adaptive Clock Recovery is generally viewed as inadequate for applications with stringent timing requirements, such as the backhaul of cellular TDM traffic.
Differential Clock Recovery uses an accurate external clock source at both sides (transmitter and receiver) of the link. The transmitter uses this external clock source as a reference and transmits the difference between the external reference clock and the TDM service clock to the receiver. The receiver aligns the timing of the TDM streams extracted from the received Ethernet packets with the TDM service clock source using the reference clock and the received information on the clock difference. A differential clock scheme using GPS (Global Positioning System) receivers providing highly accurate GPS clock information is used in many CDMA (Code Division Multiple Access) and WiMAX (Worldwide Interoperability for Microwave Access) wireless networks. However, providing a GPS-based clock or another similarly accurate clock source at the receiver is not always possible (e.g., a GPS signal is blocked by the nearby buildings and external antenna installation is prohibited) or may require a significant financial investment. Additionally, the clock difference information passed via the PSN reduces the usable capacity of the network.
The Institute of Electrical and Electronics Engineers' (IEEE) 1588v2 protocol is a precision clock synchronization protocol specifically designed for PSNs. This standard protocol defines special Ethernet packets that contain precise timing information derived from a highly accurate and stable clock. These special packets are intended to allow the receiver to accurately reconstruct the original accurate clock. However, the effectiveness of this standard is not yet proven, mainly because these special packets are still susceptible to the delays caused by network traffic congestion. Even if this effectiveness is proven, the replacement of existing equipment with new equipment that supports the IEEE 1588v2 standard will take time and will require significant capital expenditure by network operators. In addition, these special packets again result in additional traffic overhead that reduces the usable capacity of the network.
Synchronous Ethernet is described in recommendations G.8261 and G.8262 of the International Telecommunications Union (ITU). It uses modified Ethernet PHYs which can transmit and recover an accurate clock, with standard frequencies as specified by the IEEE 802.3 standard, via the Ethernet physical layer. As with most other methods that transmit the clock over the physical layer, Synchronous Ethernet can provide highly accurate and stable timing information without introducing additional overhead. However, the replacement of existing equipment with new equipment that supports the Synchronous Ethernet standard will take time and will require significant capital expenditure by network operators.
The IEEE in its 802.3ah-2004 standard (now a part of 802.3-2005) has defined two new Ethernet interfaces based on Digital Subscriber Line (DSL) technology: (i) 2BASE-TL, based on the G.SHDSL line code standard (SHDSL) for symmetric DSL, as specified in ITU-T G.991.2 standard, and (ii) 10PASS-TS, based on the G.VDSL line code standard for very high bit-rate DSL (VDSL), specified in the ITU-T G.993.1 standard. These symmetric interfaces allow carriers to provide native Ethernet service over regular unshielded twisted pair cabling. Both protocols allow an optional bonding (up to 32 pairs) for the aggregation of bandwidth and added resiliency. The ITU-T G.998.2 standard extends the IEEE 2BASE-TL/10PASS-TS implementation to any DSL technology. All DSL transceivers (also hereinafter referred to as “modems”) allow clock transfer, either natively on HDSL or SHDSL links or via Network Timing Reference (NTR) markers on ADSL or VDSL links. Here and in the remainder of this document, the term “ADSL” includes all the variations of ADSL, ADSL-Lite, ADSL2, and ADSL2+ as defined in the ITU-T G.992.1, G.992.2, G.992.3, and G.992.5 standards and their amendments. Moreover, the term “VDSL” includes all variations of VDSL and VDSL2 as defined in the ITU-T G.993.1 and G.993.2 standards and their amendments.
Unfortunately, none of these DSL technologies overcome the limitations discussed heretofore with respect to the various clock transfer methods.
Accordingly, there is a need for resilient clock transfer over multiple DSL lines.